Liquid crystal display (LCD) materials are well known by those skilled in the art of electronic design. LCD materials obey an optical response curve as shown in prior art FIG. 1. On the X-axis is the RMS (root mean squared) voltage across a pixel of the LCD material. On the Y-axis is the reflectance of the LCD pixel. The lower the reflectance, the darker the pixel. A "1" on the reflectance axis represents 100% light reflected (the pixel is off). A "0" on the reflectance axis represents 100% light absorbed and the pixel is on. Practically, 100% reflectance or absorption is not achieved and designers operate about the points labelled V.sub.OFF and V.sub.ON. A designer must ensure that the RMS driving voltage driving each individual pixel falls within this critical transition region to achieve adequate LCD contrast. However, the location of the transition region of the optical repsonse curve is a strong function of the LCD material. Therefore as LCD materials vary, so to does the location of the curve's transition region. Bias circuits attempt to generate bias voltages that satisfy the appropriate threshold magnitudes (V.sub.OFF and V.sub.ON) across all LCD operating voltages and LCD material variations.
FIG. 2 is a prior art LCD bias circuit 10 that generates a plurality of bias voltages, V.sub.LCD1, V.sub.LCD2, V.sub.LCD3, V.sub.LCD4 and V.sub.LCD5. A resistor ladder consisting of matched resistors labelled R1 and resistor R2 establish the voltage ratios of the bias voltages. For example, if R1=100K and R2=270K the following ratios are established between the bias voltages: EQU V.sub.LCD1 =0.85(V.sub.DD -V.sub.LCD5)+V.sub.LCD5, EQU V.sub.LCD2 =0.70(V.sub.DD -V.sub.LCD5)+V.sub.LCD5, EQU V.sub.LCD3 =0.30(V.sub.DD -V.sub.LCD5)+V.sub.LCD5, EQU V.sub.LCD4 =0.15(V.sub.DD -V.sub.LCD5)+V.sub.LCD5.
Therefore the bias voltages in prior art circuit 10 are a function of the value of V.sub.LCD5. The bias voltages V.sub.LCD1-V.sub.LCD4 are fixed by the establishment of V.sub.LCD5. Operational amplifiers 12, 14, 16 and 18 are unity gain buffers. LCD bias, which is defined by [(V.sub.LCD3 -V.sub.LCD5)/2]/V.sub.LCD. Substituting V.sub.LCD3 above into the equation for bias and simplifying, one obtains a constant (0.15). Bias is therefore fixed in the prior art solution.
The voltage value of V.sub.LCD5 is controlled by a voltage doubler circuit 22 in conjunction with a contrast control circuit 20. Contrast control circuit 20 is a 32 bit linear control circuit that varies the voltage at node V linearly between 0V and V.sub.DD.
This design solution is undesirable because variations in LCD voltage cause a shift in V.sub.OFF and therefore move the operating point outside the transition region. This design alters the contrast manually with a contrast knob or with keystrokes which effectuates the 32 bit control. Therefore contrast control must be manipulated manually. Further, the voltage output of the clock doubler circuit (V.sub.LCD5) is unregulated, causing it to vary as batteries wear and LCD loadings change. Regulation of voltages V.sub.DD and V.sub.LCD5 is expensive because it requires further voltage regulation circuitry. Further still, Q1 within contrast control circuit 20 draws substantial current resulting in inefficient power loss.
It, accordingly, is an object of this invention to provide a circuit and method of dynamically monitoring and controlling the LCD bias so that as LCD operating voltage varies, LCD bias may be dynamically adjusted to provide proper V.sub.OFF voltage, thereby overcoming the difficulties and limitations of the prior art. Other objects and advantages of the invention will be apparent to those of ordinary skill in the art having reference to the following specification and drawings.